TSC, with the aid of ERIM International, has investigated a number of
efficient image formation processing (IFP) algorithms for FOPEN SAR
under SBIR Phases I and II studies for DARPA and the Air Force, and
demonstrated significant reductions in processor throughput (over 3-to-1)
and memory requirements. Image formation performance of these algorithms
was demonstrated using both synthesized and real FOPEN SAR voltage phase
histories. The IFP algorithms are currently being prepared for final
demonstration in the SKY multi-processor at Rome AFB. These algorithms
have the potential of reducing the number of Digital Signal Processors
required for FOPEN SAR image processing by at least two-thirds—a
very significant reduction in cost and payload.
